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FET BIAS CONTROLLER WITH POLARISATION SWITCH AND TONE DETECTION
ISSUE 2 - FEBRUARY 2000 DEVICE DESCRIPTION
The ZNBG series of devices are designed to meet the bias requirements of GaAs and HEMT FETs commonly used in satellite receiver LNBs, PMR cellular telephones etc. with a minimum of external components. With the addition of two capacitors and a resistor the devices provide drain voltage and current control for three external grounded source FETs, generating the regulated negative rail required for FET gate biasing whilst operating from a single supply. This negative bias, at -3 volts, can also be used to supply other external circuits. The ZNBG3210/11 includes bias circuits to drive up to three external FETs. A control input to the device selects either one of two FETs as operational using 0V gate switching methodology, the third FET is permanently active. This feature is particularly used as an LNB polarisation switch. Also specific to LNB applications is the enhanced 22kHz tone detection and logic output feature which is used to enable high and low band frequency switching. The detector has been specifically designed to reject inerference such as low frequency signals and DiSEqC tone bursts - without the use of additional external components. Drain current setting of the ZNBG3210/11 is user selectable over the range 0 to 15mA, this
ZNBG3210 ZNBG3211
is achieved with the addition of a single resistor. The series also offers the choice of FET drain voltage, the 3210 gives 2.2 volts drain whilst the 3211 gives 2 volts. These devices are unconditionally stable over the full working temperature with the FETs in place, subject to the inclusion of the recommended gate and drain capacitors. These ensure RF stability and minimal injected noise. It is possible to use less than the devices full complement of FET bias controls, unused drain and gate connections can be left open circuit without affecting operation of the remaining bias circuits. In order to protect the external FETs the circuits have been designed to ensure that, under any conditions including power up/down transients, the gate drive from the bias circuits cannot exceed the range -3.5V to 1V. Furthermore if the negative rail experiences a fault condition, such as overload or short circuit, the drain supply to the FETs will shut down avoiding excessive current flow. The ZNBG3210/11 are available in QSOP20 for the minimum in device size. Device operating temperature is -40 to 70C to suit a wide range of environmental conditions.
FEATURES
APPLICATIONS
* * * * * * * * * * *
Provides bias for GaAs and HEMT FETs Drives up to three FETs Dynamic FET protection Drain current set by external resistor Regulated negative rail generator requires only 2 external capacitors Choice in drain voltage Wide supply voltage range Polarisation switch for LNBs supporting zero volt gate switching topology. 22kHz tone detection for band switching Compliant with ASTRA control specifications QSOP surface mount package 67-1
* * *
Satellite receiver LNBs Private mobile radio (PMR) Cellular telephones
ZNBG3210 ZNBG3211
ABSOLUTE MAXIMUM RATINGS
Supply Voltage Supply Current Input Voltage (VPOL) Drain Current (per FET) (set by RCAL) Operating Temperature Storage Temperature -0.6V to 12V 100mA 25V Continuous 0 to 15mA -40 to 70C -50 to 85C Power Dissipation (Tamb= 25C) QSOP20 500mW
ELECTRICAL CHARACTERISTICS. TEST CONDITIONS (Unless otherwise stated):Tamb= 25C,VCC=5V,ID=10mA (RCAL=33k)
SYMBOL PARAMETER CONDITIONS MIN. VCC ICC Supply Voltage Supply Current ID1 to ID3=0 ID1=0,ID2 to ID3=10mA, VPOL=14V ID2=0,ID1 to ID3=10mA, VPOL=15.5V ID1 to ID3=0, ILB=10mA ID1 to ID3=0, IHB=10mA (Internally generated) ISUB=0 -3.5 ISUB=-200A CG=4.7nF, CD=10nF CG=4.7nF, CD=10nF 200 350 5 6 25 25 16 16 -3.0 LIMITS TYP. MAX. 10 15 35 35 25 25 -2.5 -2.4 V mA mA mA mA mA V V UNITS
VSUB
Substrate Voltage Output Noise Drain Voltage Gate Voltage Oscillator Frequency
END ENG fO
0.02 Vpkpk 0.005 Vpkpk 800 kHz
67-2
ZNBG3210 ZNBG3211
SYMBOL PARAMETER CONDITIONS MIN. LIMITS TYP. MAX. A UNITS
GATE CHARACTERISTICS
IGO Output Current Range IDx (mA) VG1O VG1L VG1H VG2O VG2L VG2H VG3L VG3H ID IDV IDT VD1 Output Voltage Gate 1 Off Low High Output Voltage Gate 2 Off Low High Output Voltage Gate 3 Low High VPOL (V) IGOx (A) -0.05 -2.7 0.4 -0.05 -2.7 0.4 -3.5 0.4 0 -2.4 0.75 0 -2.4 0.75 -2.9 0.75 0.05 -2.0 1.0 0.05 -2.0 1.0 -2.0 1.0 V V V V V V V V -30 2000
ID1=0 VPOL=14 IGO1=0 ID1=12 VPOL=15.5 IGO1=-10 ID1=8 VPOL=15.5 IGO1=0 ID2=0 VPOL=15.5 IGO2=0 ID2=12 VPOL=14 IGO2=-10 ID2=8 VPOL=14 IGO2=0 ID3=12 ID3=8 IGO3=-10 IGO3=0
DRAIN CHARACTERISTICS
Current Current Change with VCC VCC= 5 to 10V with Tj Tj=-40 to +70C Drain 1 Voltage: High ZNBG3210 ID1=10mA, VPOL=15.5V ID1=10mA, VPOL=15.5V ZNBG3211 Drain 2 Voltage: High ZNBG3210 ID2=10mA, VPOL=14V ID2=10mA, VPOL=14V ZNBG3211 Drain 3 Voltage: High ZNBG3210 ID3=10mA ID3=10mA ZNBG3211 Voltage Change with VCC VCC= 5 to 10V with Tj Tj=-40 to +70C Leakage Current Drain 1 VD1=0.5V, VPOL=14V VD2=0.5V, VPOL=15.5V Drain 2 67-3 8 10 0.5 0.05 12 mA %/V %/C
2.0 1.8
2.2 2.0
2.4 2.2
V V
VD2
2.0 1.8
2.2 2.0
2.4 2.2
V V
VD3
2.0 1.8
2.2 2.0 0.5 50
2.4 2.2
V V %/V ppm
VDV VDT IL1 IL2
10 10
A A
ZNBG3210 ZNBG3211
SYMBOL PARAMETER CONDITIONS MIN. LIMITS TYP. MAX. UNITS
TONE DETECTION CHARACTERISTICS
IB VOUT IOUT GV fR8 VLOV ILOV VLBL VLBH VHBL VHBH Filter Amplifier Input Bias Current RF1=150k Output Voltage
5
0.02 1.75 400
0.07 1.95 520 46
0.25 2.05 650
A V A dB kHz
RF1=150k
Output Current 5 VOUT=1.96V, VFIN=2.1V Voltage Gain Rejection Frequency Output Stage LOV Volt. Range LOV Bias Current LB Output Low LB Output High HB Output Low HB Output High f=22kHz,VIN=1mV V(AC)in=1V p/p sq.w6 IL=50mA(LB or HB) VLOV=0 VLOV=0 IL=-10A VLOV=3V IL=0 VLOV=0 IL=10mA VLOV=3V IL=50mA VLOV=0 IL=-10A VLOV=3V IL=0 VLOV=0 IL=10mA VLOV=3V IL=50mA Enabled Enabled 7 Disabled 6 Disabled 7 Disabled 6 Disabled 7 Enabled 6 Enabled 7
6
1.0 -0.5 0.02 -3.5 -0.01
7.5
VCC-1.8 V 0.15 -2.75 0 1.0 -2.5 0.01 A V V
-0.025 0 2.9 3.0 -3.5 -0.01 -2.75 0
0.025 V 3.1 V -2.5 0.01 V V
-0.025 0 2.9 3.0
0.025 V 3.1 V A V ms
POLARITY SWITCH CHARACTERISTICS
IPOL VTPOL TSPOL
NOTES: 1. The negative bias voltages specified are generated on-chip using an internal oscillator. Two external capacitors, CNB and CSUB, of 47nF are required for this purpose. 2. The characteristics are measured using an external reference resistor RCAL of value 33k wired from pins RCAL to ground. 3. Noise voltage is not measured in production. 4. Noise voltage measurement is made with FETs and gate and drain capacitors in place on all outputs. CG, 4.7nF, are connected between gate outputs and ground, CD, 10nF, are connected between drain outputs and ground. 5 . These parameters are linearly related to VCC 6. These parameters are measured using Test Circuit 1 7. These parameters are measured using Test Circuit 2 8. The ZNBG32 series will also reject DiSEqC and other common switching bursts.
Input Current Threshold Voltage
VPOL=25V (Applied via RPOL=10k) 10 14 VPOL=25V (Applied via RPOL=10k)
20
40
14.75 15.5 100
Switching Speed VPOL=25V (Applied via RPOL=10k)
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ZNBG3210 ZNBG3211
TEST CIRCUIT 1
V2 Characteristics Type AC source Frequency 22kHz Voltage 350mV p/p enabled 100mV p/p disabled
TEST CIRCUIT 2
V2 Characteristics Type AC source Frequency 22kHz Voltage 350mV p/p enabled 100mV p/p disabled
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ZNBG3210 ZNBG3211
TYPICAL CHARACTERISTICS
16
Vcc = 5V
Drain Current (mA)
14 12 10 8 6 4 2 0 0 20 40 60 80 100
0.0 -0.5
Note:- Operation with loads > 200A is not guaranteed.
Vsub (V)
-1.0 -1.5 -2.0 -2.5 -3.0
Vcc = 5V 6V 8V 10V
0
0.2
0.4
0.6
0.8
1.0
Rcal (k)
External Vsub Load (mA)
JFET Drain Current v Rcal
Vsub v External Load
2.4 ZNBG3210 ONLY
2.2 ZNBG3211 ONLY
Drain Voltage (V)
2.3
Drain Voltage (V)
2.1
2.2
Vcc = 5V 6V 8V 10V
2.0
Vcc = 5V 6V 8V 10V
2.1
1.9
2.0 2 4 6 8 10 12 14 16
1.8 2 4 6 8 10 12 14 16
Drain Current (mA)
Drain Current (mA)
JFET Drain Voltage v Drain Current
JFET Drain Voltage v Drain Current
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ZNBG3210 ZNBG3211
TYPICAL CHARACTERISTICS
70
Vcc = 5V VCC = 5V VLOV = 0V Tamb = 70C Tamb = 25C Tamb = -40C
LB/HB Offset Voltage (mV)
Open Loop Gain (dB)
60 50 40 30 20 10 0 100 1k 10k 100k 1M 10M
4 2 0 -2 -4 -6 -8 0 10 20 30
40
50
Frequency (Hz)
Load Current (mA)
Open Loop Gain v Frequency
LB/HB Offset Voltage v Load Current
2.0
Open Loop Phase ()
180 150 120 90 60 30 0 100 1k 10k 100k 1M 10M
LB/HB Dropout Voltage (V)
VCC = 5V
1.9
Tamb = -40 C
1.8 1.7 1.6 1.5 1.4 1.3 1.2 0 10 20 30 40 50
Tamb = 25C Tamb = 70C VCC = 5V
Frequency (Hz)
Load Current (mA)
Open Loop Phase v Frequency
LB/HB Dropout Voltage v Load Current
1.4 1.2
VCC = 5V VIN=0.1Vpkpk Test Circuit 1
Fout Voltage (Vpkpk)
1.0 0.8 0.6 0.4 0.2 0 100 1k 10k 100k 1M
Frequency (Hz)
Filter Response
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ZNBG3210 ZNBG3211
FUNCTIONAL DIAGRAM
FUNCTIONAL DESCRIPTION
The ZNBG devices provide all the bias requirements for external FETs, including the generation of the negative supply required for gate biasing, from the single supply voltage.The diagram above shows a single stage from the ZNBG series. The ZNBG3210/11 contains 3 such stages. The negative rail generator is common to all devices. The drain voltage of the external FET QN is set by the ZNBG device to its normal operating voltage. This is determined by the on board VD Set reference, for the ZNBG3210 this is nominally 2.2 volts whilst the ZNBG3211 provides nominally 2 volts. The drain current taken by the FET is monitored by the low value resistor ID Sense. The amplifier driving the gate of the FET adjusts the gate voltage of QN so that the drain current taken matches the current called for by an external resistor RCAL. Since the FET is a depletion mode transistor, it is often necessary to drive its gate negative with respect to ground to obtain the required drain current. To provide this capability powered from a single positive supply, the device includes a low current negative supply generator. This generator uses an internal oscillator and two external capacitors, CNB and CSUB.
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ZNBG3210 ZNBG3211
The following schematic shows the function of the VPOL input. Only one of the two external FETs numberd Q1 and Q2 are powered at any one time, their selection is controlled by the input VPOL. This input is designed to be wired to the power input of the LNB via a high value (10k) resistor. With the input voltage of the LNB set at or below 14V, FET Q2 will be enabled. With the input voltage at or above 15.5V, FET Q1 will be enabled. The disabled FET has its gate driven to 0V and its drain terminal is switched open circuit. FET number Q3 is always active regardless of the voltage applied to VPOL.
Control Input Switch Function Input Sense 14 volts 15.5 volts Polarisation Vertical Select FET Q2
Horizontal
FET Q1
67-9
ZNBG3210 ZNBG3211
For many LNB applications tone detection and band switching is required. The ZNBG3210/11 includes the circuitry necessary to detect the presence of a 22kHz tone modulated on the supply input to the LNB. Referring to the following schematic diagram, the main elements of this detector are an op-amp enabling the construction of a Sallen Key filter, a rectifier/smoother and a comparator. Full control is given over the centre frequency and bandwidth of the filter by the selection of two external resistors and capacitors (one of these resistors, R2, shares the function of overvoltage protection of pin VPOL). The detector used in the ZNBG32 series has been specifically designed to reject low frequency signals, DiSEqC tone bursts and other common interference signals that may be present on the LNB supply input. This has been achieved without the need for any additional external components.
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ZNBG3210 ZNBG3211
APPLICATIONS CIRCUIT
APPLICATIONS INFORMATION
The above is a partial application circuit for the ZNBG series showing all external components required for appropriate biasing. The bias circuits are unconditionally stable over the full temperature range with the associated FETs and gate and drain capacitors in circuit. Capacitors CD and CG ensure that residual power supply and substrate generator noise is not allowed to affect other external circuits which may be sensitive to RF interference. They also serve to suppress any potential RF feedthrough between stages via the ZNBG device. These capacitors are required for all stages used. Values of 10nF and 4.7nF respectively are recommended however this is design dependent and any value between 1nF and 100nF could be used. The capacitors CNB and CSUB are an integral part of the ZNBGs negative supply generator. The negative bias voltage is generated on-chip using an internal oscillator. The required value of capacitors CNB and CSUB is 47nF. This generator produces a low current supply of approximately -3 volts. Although this generator is intended purely to bias the external FETs, it can be used to power other external circuits via the CSUB pin. Resistor RCAL sets the drain current at which all external FETs are operated. If any bias control circuit is not required, its related drain and gate connections may be left open circuit without affecting the operation of the remaining bias circuits. The ZNBG devices have been designed to protect the external FETs from adverse operating conditions. With a JFET connected to any bias circuit, the gate output voltage of the bias circuit can not exceed the range -3.5V to 1V under any conditions, including powerup and powerdown transients. Should the negative bias generator be shorted or overloaded so that the drain current of the external FETs can no longer be controlled, the drain supply to FETs is shut down to avoid damage to the FETs by excessive drain current.
67-11
ZNBG3210 ZNBG3211
The following block diagram shows the main section of an LNB designed for use with the Astra series of satellites. The ZNBG3210/11 is the core bias and control element of this circuit. The ZNBG provides the negative rail, FET bias control, polarisation switch control, tone detection and band switching with the minimum of external components. Compared to other discrete component solutions the ZNBG circuit reduces component count and overall size required. Single Universal LNB Block Diagram
Tone detection and band switching is provided on the ZNBG3210/11 devices. The following diagrams describes how this feature operates in an LNB and the external components required. The presence or absence of a 22kHz tone applied to pin FIN enables one of two outputs, LB and HB. A tone present enables HB and tone absent enables LB. The LB and HB outputs are designed to be compatible with both MMIC and discrete local oscillator applications, selected by pin LOV. Referring to Figure 1 wiring pin LOV to ground will force LB and HB to switch between -2.6V (disabled) and 0V (enabled). Referring to Figure 2 wiring pin LOV to a positive voltage source (e.g. a potential divider across VCC and ground set to the required oscillator supply voltage, VOSC) will force the LB and HB outputs to provide the required oscillator supply, VOSC, when enabled. Tone Detection Function LOV GND FIN 22kHz -- VOSC 22kHz -- Note 1: LB Disabled Enabled Disabled Enabled HB Enabled Disabled Enabled Disabled LB -2.6 volts GND Note 1 VOSC HB GND -2.6 volts VOSC Note 1
0 volts in typical LNB applications but dependent on extenal circuits.
67-12
ZNBG3210 ZNBG3211
APPLICATIONS INFORMATION(cont)
Figure 1 LOV grounded
Figure 2 LOV connected to VOSC
67-13
ZNBG3210 ZNBG3211
CONNECTION DIAGRAM
ORDERING INFORMATION
Part Number ZNBG3210Q20 ZNBG3211Q20 Package QSOP20 QSOP20 Part Mark ZNBG3210 ZNBG3211
67-14
ZNBG3210 ZNBG3211
PACKAGE DIMENSIONS
IDENTIFICATION RECESS FOR PIN 1 A C B
J
PIN No.1
D
F
K G
PIN
Millimetres MIN MAX 8.74
Inches MIN 0.337 MAX 0.344
A B C D E F G J K
8.55 0.635 1.42 0.20 3.81 1.35 0.10 5.79 0
0.025 NOM 1.52 0.30 3.99 1.75 0.25 6.20 8 0.056 0.008 0.15 0.053 0.004 0.228 0 0.06 0.012 0.157 0.069 0.01 0.244 8
Zetex plc. Fields New Road, Chadderton, Oldham, OL9-8NP, United Kingdom. Telephone: (44)161 622 4422 (Sales), (44)161 622 4444 (General Enquiries) Fax: (44)161 622 4420 Zetex GmbH Streitfeldstrae 19 D-81673 Munchen Germany Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 Zetex Inc. 47 Mall Drive, Unit 4 Commack NY 11725 USA Telephone: (631) 543-7100 Fax: (631) 864-7630 Zetex (Asia) Ltd. 3701-04 Metroplaza, Tower 1 Hing Fong Road, Kwai Fong, Hong Kong Telephone:(852) 26100 611 Fax: (852) 24250 494 These are supported by agents and distributors in major countries world-wide Zetex plc 2001 http://www.zetex.com
This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service. DiSEqC is a trademark of EUTELSAT
68
E
ZNBG3210 ZNBG3211
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